Below are the list of IEEE project titles which we will implement. Anyone interested in the below Projects Contact us by commenting your mail id and phone number.
| S.No | Project Title |
| 1 | Adaptive Low Power RTPG For BIST Based Test Application |
| 2 | Verilog Implementation of High Speed 8-bit vedic Multiplier using Barrel Shiftier |
| 3 | Verilog Implementation of Enhanced Architecture for high performance BIST TPG |
| 4 | Verilog Implementation of VITERBI Decoder for wifi-receiver |
| 5 | A High Seep Binary Point number using dadda algorithm |
| 6 | Design of high Multiplier Using Reversible Logic a vedic Mathematical Approach |
| 7 | Data Encoding Technique for reducing Energy Consumption in Network-on-chip |
| 8 | Verilog Implementation of Advance Traffic Light Controller |
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